Debug PCBs faster with an AI probing assistant
YProbe imports your netlist and BOM, builds a board graph, drives your oscilloscope, and tells you what to probe next — until you reach the root of the failure.
The 1.2 V core rail droops 180 mV whenever the Ethernet PHY
wakes — and +3V3_PHY failed outright. Both rails share
U7. Probe U7.SW next: I expect missing
switching activity. Confidence this is a dead regulator or its
enable line: 82%.
A recreation of the YProbe main window — board tree, judged capture, comparison verdicts, and the assistant's next move.
Speaks the SCPI dialect of the scope you already own
No SCPI, no problem. If your scope can't be driven over VISA — or isn't on the list — export the capture from the instrument and import the CSV/TXT file straight into YProbe. Same judged waveforms, same AI diagnosis, no instrument control required.
Everything you need to find the fault
From netlist import to a diagnosed root cause — one guided workflow that understands your actual circuit.
Board graph from your design files
Import netlists and BOMs and YProbe builds a connectivity graph of your board — nets, components, power rails, drivers and loads — so the AI reasons about your actual circuit, not a generic one. Netlist exports from most popular ECAD software are read natively:
AI-guided probing
The assistant picks the net that narrows the search fastest, configures the scope for the expected signal, and updates its fault hypotheses after every measurement. Hosted — no API keys to manage.
Real scopes or simulator
Connect an oscilloscope over VISA, or run the entire workflow against the built-in simulator — realistic waveforms, injected faults, and matching bus traffic. No instrument required to evaluate.
Probe-contact detection
YProbe knows when your probe is actually on the pad. A floating or intermittent contact does not add false measurements.
Long-duration monitoring
Catch the brownout that happens once every few minutes. Monitor mode watches rails for droops, dropouts, glitches and overshoots and logs one timestamped event per excursion — onset, worst value, recovery.
Protocol decode
UART, I²C and SPI decoded straight from captures, with channel roles inferred from your net names. Decoded traffic feeds the diagnosis automatically — a NACKing sensor is evidence, not just pixels.
Power-on capture & startup analysis
Arm a single-shot capture on power-up and check rise time, overshoot, settling and rail sequencing order against your specifications — automatically judged, automatically recorded.
Rework log, board history & diff
Mark every change you make — part removed, part replaced, pin lifted, two pads fly-wired. Verdicts are remembered across sessions, so after rework you see which nets are FIXED, REGRESSED, STILL FAILING or newly broken, and the AI judges the board you actually have.
Remote debugging without disclosure
Send your contract manufacturer a signed task package: probe points and expected signals, no netlist, no BOM, no AI reasoning. Results come back signed and the verdicts are recomputed on your machine.
Four steps from a dead board to a diagnosis
No more shotgun probing. Every measurement narrows the search.
Import your design
Load the netlist and BOM. YProbe builds the board graph and identifies power rails, buses and key signals.
Describe the symptom
Tell the assistant what's wrong — "board doesn't enumerate over USB", "3.3 V rail is dead" — in plain language.
Probe where it points
The AI picks the most informative net, sets up your scope or DMM, and judges each capture against the expected signal.
Get the diagnosis
Hypotheses narrow with every measurement until YProbe names the suspect component or net — with the evidence trail to back it up.
The brownout that "never happens when you're watching"
Single captures can't catch a rail that misbehaves once every few minutes. Monitor mode streams captures for as long as you need and logs a wall-clock-stamped event only when something actually crosses a threshold.
- One debounced event per excursion — onset, worst value, recovery
- Droop, overshoot, dropout, glitch and recovery detection
- Thresholds from your signal specs or an auto-learned baseline
- Excursion summaries feed straight into the AI's memory
Mark what you changed. YProbe keeps the score.
Swapped a resistor, pulled a cap, lifted a pin, fly-wired two pads — log it once and it stays on the record. Every PASS/FAIL is persisted per board too, so the tool can tell you what your rework actually did instead of leaving that to your memory and a spreadsheet.
- Removed, replaced, cut at pin, fly-wired, board disconnected — timestamped, with your note
- A fly-wire changes the board graph itself: the AI treats both nets as one node from then on
- FIXED / REGRESSED / STILL FAILING / NEW FAILURE per net, including the ones you forgot to re-measure
- Pull a part, watch the net pass, and YProbe ties the fix to the part that caused it
| +3V3_PHY | FAIL → PASS | FIXED |
| +1V2_CORE | FAIL → PASS | FIXED |
| USB_DP | PASS → FAIL | REGRESSED |
| I2C1_SDA | FAIL → FAIL | STILL FAILING |
| SPI2_MISO | — → FAIL | NEW FAILURE |
| nRST_MCU | FAIL → not re-measured | CHECK |
C47 removed → +3V3_PHY FAIL → PASS · high confidence · the hypothesis that blamed C47 is now confirmed
Claims you can check
YProbe is built for engineers who distrust marketing copy. So here is what the product actually does, stated precisely enough to argue with.
A bad probe touch is never a board failure
Every capture is classified as contacted, floating, intermittent, clipped or unknown, and a cross-capture tracker requires consecutive agreement before it locks. If the verdict is floating or intermittent with confidence ≥ 0.6, the capture is blocked from producing a PASS/FAIL, from entering the session record, and from reaching the AI as board evidence. "Measurement artifact" competes as a hypothesis in its own right.
Your technician gets probe points, not your IP
The remote-debug package is built by projection: only allow-listed fields are written, net names travel as stable per-board aliases, and every free-text field is scrubbed. The netlist, the BOM and the AI's reasoning are structurally absent — not merely hidden. Results come back signed, and the verdict is recomputed on your machine from the raw samples, so a technician's client can hint but never decide.
The scope stays the source of truth
Turn a knob on the front panel and YProbe follows: volts/div, time/div and channel state are read back from the instrument on every capture and every live frame. It reads the scope's own frequency measurement too, and keeps it only when it contradicts the record.
An AI that cannot invent a net name
Weaker models hallucinate component and net names no matter what the prompt says. Every name an AI returns is resolved against your actual netlist and dropped if it does not exist, before it can reach the session state or the screen. You never chase a probe point that isn't on your board.
No instrument? The simulator is the whole product
The built-in simulator covers the entire workflow, including time-varying faults — brownout, periodic dropout, thermal drift, intermittent glitch, degrading ripple — that only reveal themselves across minutes of monitoring. Bus traffic is generated coherently enough that the decoder round-trips it. Evaluate the real workflow before you connect anything.
It knows which rework fixed it
Verdicts and reworks are two timestamped streams on the same board, and YProbe joins them. A part you removed between a FAIL and a PASS on a net it sits on is attributed as the cause — with a confidence grade and a reason derived from the board's own topology, across sessions if the FAIL was yesterday's. When the link is unambiguous the hypothesis that blamed that part is marked confirmed, and the nets that were only being probed to trace that fault drop off your list.
Honest about what is validated
Instrument control and waveform readout are implemented per vendor. Rigol is verified on real hardware, down to the USB-TMC quirk that forces a full-frame read to be chunked. The other dialects are transcribed from vendor programming guides and are flagged unvalidated in the app until a real instrument says otherwise. A misfiring reader fails loudly rather than returning a plausible wrong number.
Plans that scale with your bench
Every plan includes hosted AI diagnosis — no API keys, no per-token bills, no model to configure. Prices are per user, per month, in USD.
Pricing is provisional while YProbe is in early access; annual figures reflect the planned ~2-months-free discount.
Trial
Evaluate at your bench's pace — hardware projects don't finish in a week.
7 days · renewable
- 2 board designs / month
- Hosted AI diagnosis
- Request a fresh 7-day key when it expires
- Community support
- Anonymized session summaries (required)
Light
Solo bring-up and repair, one board at a time.
billed monthly
- 10 board designs / month
- Hosted AI diagnosis
- Standard support
- Category-level fault telemetry (can be disabled)
Light+
Bring your contract manufacturer into the loop.
billed monthly
- Everything in Light
- 10 board designs / month
- Remote debugging (designer ⇄ factory)
- Free technician clients
- Category-level fault telemetry (can be disabled)
Pro
For engineers debugging boards every week.
billed monthly
- 50 board designs / month
- Multiboard systems
- Remote debugging + free technician clients
- Zero telemetry — fully private
- Standard support
Pro+
High-volume benches and busy labs.
billed monthly
- Unlimited board designs
- Multiboard systems
- Remote debugging + free technician clients
- Zero telemetry — fully private
- Priority support
Enterprise
Priced on board volume, not seats.
annual · committed boards / month
- Unlimited boards · site license
- Unlimited seats per facility, per-board overage
- Choose your LLM, private endpoint, or fully offline
- Zero telemetry · DPA & custom retention
- Priority + dedicated support
Your contract manufacturer debugs for free
On Light+ and above, remote debugging includes free technician clients. The CM's technician installs YProbe at no charge — only the designer needs a subscription. The technician sees probe points and expected signals, and never receives your netlist, BOM, or the AI's reasoning. Results come back signed, and verdicts are recomputed on your side.
| Feature | Trial | Light | Light+ | Pro | Pro+ | Enterprise |
|---|---|---|---|---|---|---|
| Price | Free · 7 days | $50/mo | $100/mo | $200/mo | $400/mo | Contact us |
| Board designs / month | 2 | 10 | 10 | 50 | Unlimited | Unlimited · site license |
| Multiboard systems | — | — | — | ✓ | ✓ | ✓ |
| Remote debugging (designer ⇄ factory) | — | — | ✓ | ✓ | ✓ | ✓ |
| AI diagnosis | Hosted | Hosted | Hosted | Hosted | Hosted | Your LLM / private endpoint / fully offline |
| Data sharing | Anonymized session summaries (required) | Category-level fault telemetry (can be disabled) | Category-level fault telemetry (can be disabled) | Zero telemetry | Zero telemetry | Zero telemetry · contractual (DPA) |
| Support | Community | Standard | Standard | Standard | Priority | Priority + dedicated |
Frequently asked questions
Can't find your answer? Write to support@yprobe.com.
YProbe is in early access. The desktop app is built and running on real hardware; the hosted account and billing backend is what gates the public release. Join the waitlist and you'll get a build when the first wave goes out — earlier if you have a board you're willing to debug with us.
One unique netlist. Debugging the same design any number of times in a month uses one slot — ten physical units of the same board are still one design. Your monthly count resets each billing cycle.
Trial: anonymized session summaries — fault categories, measurement verdicts and fix categories, with net names anonymized. Your netlist and BOM are never uploaded as part of sharing. Light / Light+: category-level fault telemetry only (e.g. "I²C · no ACK · missing pull-up" on a "clock generator IC" — no part numbers, no net names, no design data), and you can turn it off in Settings. Pro and above send nothing.
Yes, on hosted tiers — and we'd rather say so plainly than bury it. The structured board context needed for a diagnosis is processed by our server per request to run the AI analysis. Your design files themselves stay on your machine. Enterprise customers can route AI to their own private endpoint or run fully offline, so nothing leaves their network.
You compose a signed task package; the technician runs a free YProbe client that shows probe points and expected signals — never your netlist, BOM, or the AI's reasoning. Results come back signed, and verdicts are recomputed on your side. Tasks can be conditional ("if task 3 fails, probe this next"), so the queue keeps the technician moving across time zones while you sleep.
No. All plans include hosted AI — no API keys, no per-token bills, nothing to configure. Enterprise can optionally bring their own LLM endpoint, including a local model for air-gapped labs.
Any VISA-accessible scope. Rigol is verified on real hardware; Siglent, Keysight and Tektronix command sets are implemented from the vendor programming guides and marked unvalidated in the app until we confirm them on an instrument. An unrecognised vendor falls back to the Rigol dialect with a warning rather than failing. No scope at all? The built-in simulator covers the whole workflow, including the intermittent-fault waveforms that exercise monitor mode.
Yes. Export a waveform to CSV or TXT from the scope's own software — Hantek, OWON, PicoScope and similar — and import the file. It runs through the same judging and diagnosis pipeline as a live capture; only the automatic instrument setup is unavailable.
Netlists from most popular ECAD software: KiCad, Altium Designer
(both the Protel netlist and the Wire List report), Cadence Allegro and
OrCAD (Telesis), Mentor/Siemens PADS-PCB, and EDIF 2 0 0 — the
interchange format nearly every other tool can export. Several of those
share the .net extension, so YProbe sniffs the file content
rather than trusting the extension. Add a CSV BOM, and optionally an
IPC-2581 board layout for probe-point locations.
Monthly plans: yes, effective at the end of the billing period. Annual plans (including Enterprise) renew yearly.
Get the first build
Tell us what you debug and we'll send you YProbe when your wave opens. Engineers with a board on the bench right now go to the front of the queue.