Reason about your circuit, not a generic schematic
Import the netlist and a CSV or Excel BOM. YProbe builds a graph of nets, components, rails, drivers and loads, then checks every suggested net and component against the design before it reaches the session.
- KiCad, Altium, Cadence/OrCAD, PADS and EDIF
- Power-rail, bus, driver and load classification
- Expected signals tied to the actual board topology